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@ -230,17 +230,19 @@ |
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#define GLM_ARCH_SIMD_BIT (0x00001000) |
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#define GLM_ARCH_SIMD_BIT (0x00001000) |
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#define GLM_ARCH_NEON_BIT (0x00000001) |
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#define GLM_ARCH_NEON_BIT (0x00000001) |
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#define GLM_ARCH_SSE2_BIT (0x00000002) |
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#define GLM_ARCH_SSE_BIT (0x00000002) |
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#define GLM_ARCH_SSE3_BIT (0x00000004) |
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#define GLM_ARCH_SSE2_BIT (0x00000004) |
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#define GLM_ARCH_SSSE3_BIT (0x00000008) |
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#define GLM_ARCH_SSE3_BIT (0x00000008) |
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#define GLM_ARCH_SSE41_BIT (0x00000010) |
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#define GLM_ARCH_SSSE3_BIT (0x00000010) |
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#define GLM_ARCH_SSE42_BIT (0x00000020) |
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#define GLM_ARCH_SSE41_BIT (0x00000020) |
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#define GLM_ARCH_AVX_BIT (0x00000040) |
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#define GLM_ARCH_SSE42_BIT (0x00000040) |
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#define GLM_ARCH_AVX2_BIT (0x00000080) |
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#define GLM_ARCH_AVX_BIT (0x00000080) |
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#define GLM_ARCH_AVX2_BIT (0x00000100) |
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#define GLM_ARCH_UNKNOWED (0) |
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#define GLM_ARCH_UNKNOWED (0) |
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#define GLM_ARCH_X86 (GLM_ARCH_X86_BIT) |
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#define GLM_ARCH_X86 (GLM_ARCH_X86_BIT) |
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#define GLM_ARCH_SSE2 (GLM_ARCH_SSE2_BIT | GLM_ARCH_SIMD_BIT | GLM_ARCH_X86) |
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#define GLM_ARCH_SSE (GLM_ARCH_SSE_BIT | GLM_ARCH_SIMD_BIT | GLM_ARCH_X86) |
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#define GLM_ARCH_SSE2 (GLM_ARCH_SSE2_BIT | GLM_ARCH_SSE) |
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#define GLM_ARCH_SSE3 (GLM_ARCH_SSE3_BIT | GLM_ARCH_SSE2) |
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#define GLM_ARCH_SSE3 (GLM_ARCH_SSE3_BIT | GLM_ARCH_SSE2) |
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#define GLM_ARCH_SSSE3 (GLM_ARCH_SSSE3_BIT | GLM_ARCH_SSE3) |
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#define GLM_ARCH_SSSE3 (GLM_ARCH_SSSE3_BIT | GLM_ARCH_SSE3) |
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#define GLM_ARCH_SSE41 (GLM_ARCH_SSE41_BIT | GLM_ARCH_SSSE3) |
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#define GLM_ARCH_SSE41 (GLM_ARCH_SSE41_BIT | GLM_ARCH_SSSE3) |
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@ -280,6 +282,8 @@ |
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# define GLM_ARCH (GLM_ARCH_SSE3) |
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# define GLM_ARCH (GLM_ARCH_SSE3) |
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#elif defined(GLM_FORCE_SSE2) |
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#elif defined(GLM_FORCE_SSE2) |
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# define GLM_ARCH (GLM_ARCH_SSE2) |
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# define GLM_ARCH (GLM_ARCH_SSE2) |
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#elif defined(GLM_FORCE_SSE) |
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# define GLM_ARCH (GLM_ARCH_SSE) |
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#else |
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#else |
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# if defined(__AVX2__) |
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# if defined(__AVX2__) |
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# define GLM_ARCH (GLM_ARCH_AVX2) |
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# define GLM_ARCH (GLM_ARCH_AVX2) |
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