diff --git a/CMakeLists.txt b/CMakeLists.txt
index 66c29c8a..d6b3e0ea 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -153,7 +153,7 @@ elseif(CMAKE_CXX_COMPILER_ID MATCHES "MSVC")
 	message("GLM: Visual C++ - ${CMAKE_CXX_COMPILER_ID} compiler")
 
 	add_compile_options(/FAs /W4 /WX)
-	add_compile_options(/wd4324 /wd4389 /wd4127 /wd4309 /wd4267 /wd4146 /wd4201 /wd4464 /wd4514 /wd4701 /wd4820 /wd4365)
+	add_compile_options(/wd4324 /wd4389 /wd4127 /wd4267 /wd4146 /wd4201 /wd4464 /wd4514 /wd4701 /wd4820 /wd4365)
 	add_definitions(-D_CRT_SECURE_NO_WARNINGS)
 endif()
 
diff --git a/glm/gtc/bitfield.inl b/glm/gtc/bitfield.inl
index 66ac4a43..0646665c 100644
--- a/glm/gtc/bitfield.inl
+++ b/glm/gtc/bitfield.inl
@@ -172,20 +172,20 @@ namespace detail
 		glm::uint32 REG3(z);
 		glm::uint32 REG4(w);
 
-		REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint32>(0x000F000F000F000F);
-		REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint32>(0x000F000F000F000F);
-		REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint32>(0x000F000F000F000F);
-		REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint32>(0x000F000F000F000F);
-
-		REG1 = ((REG1 <<  6) | REG1) & static_cast<glm::uint32>(0x0303030303030303);
-		REG2 = ((REG2 <<  6) | REG2) & static_cast<glm::uint32>(0x0303030303030303);
-		REG3 = ((REG3 <<  6) | REG3) & static_cast<glm::uint32>(0x0303030303030303);
-		REG4 = ((REG4 <<  6) | REG4) & static_cast<glm::uint32>(0x0303030303030303);
-
-		REG1 = ((REG1 <<  3) | REG1) & static_cast<glm::uint32>(0x1111111111111111);
-		REG2 = ((REG2 <<  3) | REG2) & static_cast<glm::uint32>(0x1111111111111111);
-		REG3 = ((REG3 <<  3) | REG3) & static_cast<glm::uint32>(0x1111111111111111);
-		REG4 = ((REG4 <<  3) | REG4) & static_cast<glm::uint32>(0x1111111111111111);
+		REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint32>(0x000F000Fu);
+		REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint32>(0x000F000Fu);
+		REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint32>(0x000F000Fu);
+		REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint32>(0x000F000Fu);
+
+		REG1 = ((REG1 <<  6) | REG1) & static_cast<glm::uint32>(0x03030303u);
+		REG2 = ((REG2 <<  6) | REG2) & static_cast<glm::uint32>(0x03030303u);
+		REG3 = ((REG3 <<  6) | REG3) & static_cast<glm::uint32>(0x03030303u);
+		REG4 = ((REG4 <<  6) | REG4) & static_cast<glm::uint32>(0x03030303u);
+
+		REG1 = ((REG1 <<  3) | REG1) & static_cast<glm::uint32>(0x11111111u);
+		REG2 = ((REG2 <<  3) | REG2) & static_cast<glm::uint32>(0x11111111u);
+		REG3 = ((REG3 <<  3) | REG3) & static_cast<glm::uint32>(0x11111111u);
+		REG4 = ((REG4 <<  3) | REG4) & static_cast<glm::uint32>(0x11111111u);
 
 		return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
 	}